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745.

An n-channel JFET, having a pinch-off voltage (V_p) of –5 V, shows a transconductance (g_m) of 1 mA/V when the applied gate-to-source voltage (V_GS) is –3V. Its maximum transconductance (in mA/V) is [2 marks]
(a) 1.5
(b) 2.0
(c) 2.5
(d) 3.0

asked in Electrical Engineering, 2001

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746.

An op-amp, having a slew rate of 62.8 V/µsec, is connected in a voltage follower configuration. If the maximum amplitude of the input sinusoid is 10V, then the minimum frequency at which the slew rate limited distortion would set in at the output is [2 marks]
(a) 1.0 MHz
(b) 6.28 MHz
(c) 10.0 MHz
(d) 62.8 MHz

asked in Electrical Engineering, 2001

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747.

A sample-and-hold (S/H) circuit, having a holding capacitor of 0.1 nF, is used at the input of an ADC (analog-to-digital converter). The conversion time of the ADC is 1µsec, and during this time, the capacitor should not lose more than 0.5% of the charge put across it during the sampling time. The maximum value of the input signal to the S/H circuit is 5V. The leakage current of the S/H circuit should be less than [2 marks]
(a) 2.5 mA
(b) 0.25 mA
(c) 25.0 µA
(d) 2.5 µA

asked in Electrical Engineering, 2001

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748.

An Intel 8085 processor is executing the program given below.
MVI A, 10H
MVI B, 10H
BACK: NOP
ADD B
RLC
JNC BACK
HLT
The number of times that the operation NOP will be executed is equal to
[2 marks]
(a) 1
(b) 2
(c) 3
(d) 4

asked in Electrical Engineering, 2001

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749.

For the oscillator circuit shown in Fig, the expression for the time period of oscillation can be given by (where τ =RC)

[2 marks]
(a) τ ln 3
(b) 2τ ln 3
(c) τ ln 2
(d) 2τ ln 2

asked in Electrical Engineering, 2001

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750.

Resistances R₁ and R₂ have, respectively, nominal values of 10Ω and 5Ω, and tolerances of ±5% and ±10%. The range of values for the parallel combination of R₁ and R₂ is [2 marks]
(a) 3.077 Ω to 3.636 Ω
(b) 2.805 Ω to 3.371 Ω
(c) 3.237 Ω to 3.678 Ω
(d) 3.192 Ω to 3.435 Ω

asked in Electrical Engineering, 2001

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