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7.

For the feedback control system shown in figure, the process transfer function is G_p(s) = 1/[s(s+1)] and the complification factor of the power amplifier is K ≥ 0.
The design specifications required for the system are a time constant of 1 sec and a damping ratio of 0.707.
(a) Find the desired locations of the closed loop poles.
(b) Write down the required characteristic equation for the system. Hence determine the PD controller transfer function G_o(s) when K = 1.
(c) Sketch the root-locus for the system.

[5 marks]

asked in Electronics and Communication Engineering, 2001

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8.

Consider the feedback control system shown in figure.
(a) Find the transfer function of the system and its characteristic equation.
(b) Use the Routh-Hurwitz criterion to determine the range of K for which the system is stable.

[5 marks]

asked in Electronics and Communication Engineering, 2001

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9.

A feedback control system is shown in figure.
(a) Draw the signal-flow graph that represents the system.
(b) Find the total number of loops in the graph and determine the loop-gains of all the loops.
(c) Find the number of all possible combination of non-touching loops taken two at a time.
(d) Determine the transfer function of the system using the signal-flow graph.

[5 marks]

asked in Electronics and Communication Engineering, 2001

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10.

Consider the following sequence of instructions for an 8085 microprocessor based system.

(a) If the program execution begins at the location FF00 H, write down the sequence of instructions which are actually executed till a HLT instruction. (Assume all flags are initially RESET)
(b) Which of the three ports (PORT1, PORT2 and PORT3) will be loaded with data and what is the bit pattern of the data?
[5 marks]

asked in Electronics and Communication Engineering, 2001

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11.

For the digital block shown in Figure (a), the output Y=f(S₃,S₂,S₁,S₀) where S₃ is MSB and S₀ is LSB. Y is given in terms of minterms as
Y = ∑m(1,5,6,7,11,12,13,15) and its complement is
Y = ∑m(0,2,3,4,8,9,10,14)
(a) Enter the logical values in the given Karnaugh map [Fig.(b)] for the output Y.
(b) Write down the expression for Y in sum-of products from using minimum number of terms
(c) Draw the circuit for the digital logic boxes using four 2-input NAND gates only for each of the boxes.

[5 marks]

asked in Electronics and Communication Engineering, 2001

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12.

In figure, the output of the oscillator, V₁ has 10V peak amplitude with zero DC value. The transfer characteristic of the Schmitt inverter is also shown in figure.
Assume that the JK flip-flop is resent at time t = 0.
(a) What is the period and duty cycle of the waveform V₂?
(b) What is the period and duty cycle of the waveform V₃?
(c) Sketch V₁, V₂ and V₃ for the duration 0 ≤ t ≤ 6µs. Clearly indicate the exact timings when the waveforms V₂ and V₃ make high-to-low and low-to-high transitions.

[5 marks]

asked in Electronics and Communication Engineering, 2001

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