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505.

The frequency response of a linear, time-invariant system is given by
H(f) = 5/(1 + j10πf). The step response of the system is: [2 marks]
(A) 5(1-e^-5t)u(t)
(B) 5(1-e^-t/5)u(t)
(C) (1-e^-5t)/5 u(t)
(D) (1-e^-t/5)/5 u(t)

asked in Electronics and Communication Engineering, 2007

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506.

A Hilbert transformer is a [2 marks]
(A) non-linear system
(B) non-causal system
(C) time-varying system
(D) low-pass system

asked in Electronics and Communication Engineering, 2007

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507.

The 3-dB bandwidth of the low-pass signal e^-tu(t), where u(t ) is the unit step function, is given by [2 marks]
(A) 1/2π Hz
(B) (1/2π) √√2 - 1 Hz
(C) ∞
(D) 1 Hz

asked in Electronics and Communication Engineering, 2007

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508.

An 8255 chip is interfaced to an 8085 microprocessor system as an I/O mapped I/O as shown in the figure. The address lines Ao and A1 of the 8085 are used by the 8255 chip to decode internally its three ports and the Control register. The address lines A3 to A7 as well as the IO|M signal are used for address decoding. The range of addresses for which the 8255 chip would get selected is:

[2 marks]
(A) F8H – FBH
(B) F8H – FCH
(C) F8H – FFH
(D) F0H – F7H

asked in Electronics and Communication Engineering, 2007

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509.

For the circuit shown, the counter state (Q₁Q_o) follows the sequence

[2 marks]
(A) 00, 01, 10, 11, 00 …
(B) 00, 01, 10, 00, 01 …
(C) 00, 01, 11, 00, 01 …
(D) 00, 10, 11, 00, 10 …

asked in Electronics and Communication Engineering, 2007

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510.

The following binary values were applied to the X and Y inputs of the NAND latch shown in the figure in the sequence indicated below:
X = 0,Y = 1; X = 0,Y = 0; X = 1,Y = 1.
The corresponding stable P, Q outputs will be:

[2 marks]
(A) P = 1, Q = 0; P = 1, Q = 0; P = 1, Q = 0 or P = 0, Q = 1
(B) P = 1, Q = 0; P = 0, Q = 1; or P = 0, Q = 1; P = 0, Q = 1
(C) P = 1, Q = 0; P = 1, Q = 1; P = 1, Q = 0 or P = 0, Q = 1
(D) P = 1, Q = 0; P = 1, Q = 1; P = 1, Q = 1

asked in Electronics and Communication Engineering, 2007

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